Our expert researchers carefully review product brochure/ technical specification sheet/ datasheet/ review papers etc. that are related to product in question to confirm inclusion of patented technology in the product.
Product teardown reporting is a mechanical decomposition of technology based devices. In industry, product teardown is generally used to understand how product works and guide enterprise toward more streamlined solutions in future.
For assembled products, our team is well equipped with resources and facilities to tear down the assembled product and listing component code/marking and manufacturer of each component along with high resolution photograph of dismantling procedure to show the location of component and associated electrical connections. We provide intelligence into phones, tablet, laptop, wearable, smart home devices, electrical appliances etc. This helps in-
Identifying the underlying component and thus opens the door for in depth review of product features in view of patented technology
Identifying the manufacturer of each component and thus expanding the list of potential infringers
Identifying details of contributory components involved in infringement and thus helps in damage calculation
Estimating the bill of materials
A typical Product Teardown involves following steps-
To download sample tear down report click here.
Our capabilities for testing input/output of products to monitor their performance and uncover underlying features provide cutting edge in concluding infringement of Wireless technology, Semiconductor Systems and Telecommunications. System level analysis analyze and list down operation, function, timing and other performance related features to compare and draw similarities between accused product and patented technology. I/O testing is generally used to confirm an expected output as the final result using lab equipment. I/O testing results are primarily used to support expert’s inferences in an EoU that relates to a backend processes.
Sometimes simple teardowns of products aren’t good enough to explain the workings of a product. Recent development in massive integration of billions of devices and features in nanoscaled layered components have forced RE to evolve into a specialized niche to support patent licensing activities.
For new entrants in the market/technology space, RE plays a crucial role by letting them know what the competitor is doing. Upon reviewing parts list involved in manufacturing a product, one can figure out challenging/problematic areas and align research in a direction to come up with the best possible solution for the challenge/problem.
Our offshore capability to confirm unauthorized use of complex processes/methods disclosed in semiconductor patents using cross sectional analysis/ structural analysis/reverse engineering of product in question is the last step to generate foolproof evidence of use. Reverse Engineering greatly helps in understanding the intricacies of a semiconductor by analyzing underlying -
Process- Analyzing the process simply means de-layering an IC component to understand how chip was made and what are they made of.
Process analysis usually relies on data relating to cross-section/structure which is collected using SEM (Scanning electron microscopy), TEM (Transmission electron microscopy) and SCM (Scanning Capacitance Microscopy). To understand chemical composition of underlying layers -dispersive X-ray spectroscopy or secondary ion mass spectrometry is used. These data are then used to reconstruct and understand layer-by-layer structure of component.
Circuit – Circuit extraction is the most complex part of RE studies. It involves package removal followed by de-layering and imaging the component to understand how chip works.
In semiconductor industry, Circuit Extraction is primarily used for circuit simulation, static timing analysis, signal integrity, power analysis and optimization, and logic to layout comparison. With devices following Moore’s Law and introduction of 7nm fabrication technologies, circuit extraction is growing more complex yet interesting and important to understand the functioning of multiple modules within a single semiconductor device.
Major steps involved in Circuit Extraction-
Package Removal- A variety of acids at various temperatures are used depending on the composition and size of the particular package. These solutions dissolve away the packaging material, but do not damage the die.
Device De-layering– It simply means to create a single sample of the component at each layer and at the polysilicon transistor gate level. It accurately strips off each layer, one at a time, while keeping the entire surface planar.
Imaging & Stitching /Aligning - SEM (Scanning electron microscopy), TEM (Transmission electron microscopy) are primarily used to take images of IC layers. These images are further stitched/aligned to generate a final image for analysis.
Annotation – Once the data is collated, the actual work of reading back the circuit begins at annotation stage. Circuit is redrawn/extracted by taking note of all transistors, capacitors, diodes, and other components, interconnect layers, contacts and vias. Currently, many vendors provide specialized software tools for annotation.
Analysis – Extraction of circuit from annotated images requires high observation and analytical skill set. Experienced analysts carefully analyze sub-circuits to extract circuit if visible from the images. For complex system (digital blocks) analysts use automated extraction software tools.